James Clarke
2018-11-07 18:27:41 UTC
This operator allows compilers to expand the "la" pseduo-instruction and
potentially split up the two instructions.
gas/
* config/tc-riscv.c (percent_op_utype): Add entry for a new
%got_pcrel_hi operator.
* testsuite/gas/riscv/no-relax-reloc.d: Update for new
%got_pcrel_hi operator test.
* testsuite/gas/riscv/no-relax-reloc.s: Add a %got_pcrel_hi
operator test.
* testsuite/gas/riscv/relax-reloc.d: Update for new
%got_pcrel_hi operator test.
* testsuite/gas/riscv/relax-reloc.s: Add a %got_pcrel_hi
operator test.
---
gas/config/tc-riscv.c | 1 +
gas/testsuite/gas/riscv/no-relax-reloc.d | 4 +++-
gas/testsuite/gas/riscv/no-relax-reloc.s | 3 +++
gas/testsuite/gas/riscv/relax-reloc.d | 7 +++++--
gas/testsuite/gas/riscv/relax-reloc.s | 3 +++
5 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index 987377ae81..5f4a1bbe83 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -1286,6 +1286,7 @@ static const struct percent_op_match percent_op_utype[] =
{
{"%tprel_hi", BFD_RELOC_RISCV_TPREL_HI20},
{"%pcrel_hi", BFD_RELOC_RISCV_PCREL_HI20},
+ {"%got_pcrel_hi", BFD_RELOC_RISCV_GOT_HI20},
{"%tls_ie_pcrel_hi", BFD_RELOC_RISCV_TLS_GOT_HI20},
{"%tls_gd_pcrel_hi", BFD_RELOC_RISCV_TLS_GD_HI20},
{"%hi", BFD_RELOC_RISCV_HI20},
diff --git a/gas/testsuite/gas/riscv/no-relax-reloc.d b/gas/testsuite/gas/riscv/no-relax-reloc.d
index 62f28e0927..c2ca1aa6e7 100644
--- a/gas/testsuite/gas/riscv/no-relax-reloc.d
+++ b/gas/testsuite/gas/riscv/no-relax-reloc.d
@@ -9,4 +9,6 @@ RELOCATION RECORDS FOR .*
0+4 R_RISCV_LO12_I.*
0+8 R_RISCV_PCREL_HI20.*
0+c R_RISCV_PCREL_LO12_I.*
-0+10 R_RISCV_CALL.*
+0+10 R_RISCV_GOT_HI20.*
+0+14 R_RISCV_PCREL_LO12_I.*
+0+18 R_RISCV_CALL.*
diff --git a/gas/testsuite/gas/riscv/no-relax-reloc.s b/gas/testsuite/gas/riscv/no-relax-reloc.s
index 7f1a484fc2..d63852d08e 100644
--- a/gas/testsuite/gas/riscv/no-relax-reloc.s
+++ b/gas/testsuite/gas/riscv/no-relax-reloc.s
@@ -5,4 +5,7 @@ target:
.LA0: auipc a5,%pcrel_hi(bar)
lw a0,%pcrel_lo(.LA0)(a5)
+ .LA1: auipc a5,%got_pcrel_hi(baz)
+ lw a0,%pcrel_lo(.LA1)(a5)
+
call target
diff --git a/gas/testsuite/gas/riscv/relax-reloc.d b/gas/testsuite/gas/riscv/relax-reloc.d
index f5f592ce03..623218ec5d 100644
--- a/gas/testsuite/gas/riscv/relax-reloc.d
+++ b/gas/testsuite/gas/riscv/relax-reloc.d
@@ -13,5 +13,8 @@ RELOCATION RECORDS FOR .*
0+8 R_RISCV_RELAX.*
0+c R_RISCV_PCREL_LO12_I.*
0+c R_RISCV_RELAX.*
-0+10 R_RISCV_CALL.*
-0+10 R_RISCV_RELAX.*
+0+10 R_RISCV_GOT_HI20.*
+0+14 R_RISCV_PCREL_LO12_I.*
+0+14 R_RISCV_RELAX.*
+0+18 R_RISCV_CALL.*
+0+18 R_RISCV_RELAX.*
diff --git a/gas/testsuite/gas/riscv/relax-reloc.s b/gas/testsuite/gas/riscv/relax-reloc.s
index 7f1a484fc2..d63852d08e 100644
--- a/gas/testsuite/gas/riscv/relax-reloc.s
+++ b/gas/testsuite/gas/riscv/relax-reloc.s
@@ -5,4 +5,7 @@ target:
.LA0: auipc a5,%pcrel_hi(bar)
lw a0,%pcrel_lo(.LA0)(a5)
+ .LA1: auipc a5,%got_pcrel_hi(baz)
+ lw a0,%pcrel_lo(.LA1)(a5)
+
call target
potentially split up the two instructions.
gas/
* config/tc-riscv.c (percent_op_utype): Add entry for a new
%got_pcrel_hi operator.
* testsuite/gas/riscv/no-relax-reloc.d: Update for new
%got_pcrel_hi operator test.
* testsuite/gas/riscv/no-relax-reloc.s: Add a %got_pcrel_hi
operator test.
* testsuite/gas/riscv/relax-reloc.d: Update for new
%got_pcrel_hi operator test.
* testsuite/gas/riscv/relax-reloc.s: Add a %got_pcrel_hi
operator test.
---
gas/config/tc-riscv.c | 1 +
gas/testsuite/gas/riscv/no-relax-reloc.d | 4 +++-
gas/testsuite/gas/riscv/no-relax-reloc.s | 3 +++
gas/testsuite/gas/riscv/relax-reloc.d | 7 +++++--
gas/testsuite/gas/riscv/relax-reloc.s | 3 +++
5 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index 987377ae81..5f4a1bbe83 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -1286,6 +1286,7 @@ static const struct percent_op_match percent_op_utype[] =
{
{"%tprel_hi", BFD_RELOC_RISCV_TPREL_HI20},
{"%pcrel_hi", BFD_RELOC_RISCV_PCREL_HI20},
+ {"%got_pcrel_hi", BFD_RELOC_RISCV_GOT_HI20},
{"%tls_ie_pcrel_hi", BFD_RELOC_RISCV_TLS_GOT_HI20},
{"%tls_gd_pcrel_hi", BFD_RELOC_RISCV_TLS_GD_HI20},
{"%hi", BFD_RELOC_RISCV_HI20},
diff --git a/gas/testsuite/gas/riscv/no-relax-reloc.d b/gas/testsuite/gas/riscv/no-relax-reloc.d
index 62f28e0927..c2ca1aa6e7 100644
--- a/gas/testsuite/gas/riscv/no-relax-reloc.d
+++ b/gas/testsuite/gas/riscv/no-relax-reloc.d
@@ -9,4 +9,6 @@ RELOCATION RECORDS FOR .*
0+4 R_RISCV_LO12_I.*
0+8 R_RISCV_PCREL_HI20.*
0+c R_RISCV_PCREL_LO12_I.*
-0+10 R_RISCV_CALL.*
+0+10 R_RISCV_GOT_HI20.*
+0+14 R_RISCV_PCREL_LO12_I.*
+0+18 R_RISCV_CALL.*
diff --git a/gas/testsuite/gas/riscv/no-relax-reloc.s b/gas/testsuite/gas/riscv/no-relax-reloc.s
index 7f1a484fc2..d63852d08e 100644
--- a/gas/testsuite/gas/riscv/no-relax-reloc.s
+++ b/gas/testsuite/gas/riscv/no-relax-reloc.s
@@ -5,4 +5,7 @@ target:
.LA0: auipc a5,%pcrel_hi(bar)
lw a0,%pcrel_lo(.LA0)(a5)
+ .LA1: auipc a5,%got_pcrel_hi(baz)
+ lw a0,%pcrel_lo(.LA1)(a5)
+
call target
diff --git a/gas/testsuite/gas/riscv/relax-reloc.d b/gas/testsuite/gas/riscv/relax-reloc.d
index f5f592ce03..623218ec5d 100644
--- a/gas/testsuite/gas/riscv/relax-reloc.d
+++ b/gas/testsuite/gas/riscv/relax-reloc.d
@@ -13,5 +13,8 @@ RELOCATION RECORDS FOR .*
0+8 R_RISCV_RELAX.*
0+c R_RISCV_PCREL_LO12_I.*
0+c R_RISCV_RELAX.*
-0+10 R_RISCV_CALL.*
-0+10 R_RISCV_RELAX.*
+0+10 R_RISCV_GOT_HI20.*
+0+14 R_RISCV_PCREL_LO12_I.*
+0+14 R_RISCV_RELAX.*
+0+18 R_RISCV_CALL.*
+0+18 R_RISCV_RELAX.*
diff --git a/gas/testsuite/gas/riscv/relax-reloc.s b/gas/testsuite/gas/riscv/relax-reloc.s
index 7f1a484fc2..d63852d08e 100644
--- a/gas/testsuite/gas/riscv/relax-reloc.s
+++ b/gas/testsuite/gas/riscv/relax-reloc.s
@@ -5,4 +5,7 @@ target:
.LA0: auipc a5,%pcrel_hi(bar)
lw a0,%pcrel_lo(.LA0)(a5)
+ .LA1: auipc a5,%got_pcrel_hi(baz)
+ lw a0,%pcrel_lo(.LA1)(a5)
+
call target
--
2.17.1
2.17.1